Publicaciones en las que colabora con JOSÉ FRANCISCO TIRADO FERNÁNDEZ (10)

1996

  1. A method for area estimation of datapath in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258265

  2. Method for area estimation of data-path in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258-265

1995

  1. FIDIAS: an integral approach to high-level synthesis

    IEE Proceedings: Circuits, Devices and Systems, Vol. 142, Núm. 4, pp. 227-235

1993

  1. Data path structures and heuristics for testable allocation in high level synthesis

    Microprocessing and Microprogramming, Vol. 39, Núm. 2-5, pp. 263-266

  2. Guidance for optimization-based synthesis tools

    Microprocessing and Microprogramming, Vol. 37, Núm. 1-5, pp. 95-98

1992

  1. Design control in a high level synthesis system

    Microprocessing and Microprogramming, Vol. 34, Núm. 1-5, pp. 93-96

  2. Heuristics for branch-and-bound global allocation

    European Design Automation Conference

1991

  1. Un sistema flexible de síntesis de alto nivel

    Diseño de circuitos integrados: actas del VI Congreso. Santander, 11/15 de noviembre de 1991

1990

  1. Hardware allocation in FIDIAS system

    Proc 1990 IEEE Int Conf Comput Syst Software Eng COMPEURO 90

1988

  1. Microprocessor instruction for undergraduate students

    Education and Computing, Vol. 4, Núm. 4, pp. 265-272