Publicaciones en colaboración con investigadores/as de University College Dublin (29)

2023

  1. Integration of a Real-Time CCSDS 410.0-B-32 Error-Correction Decoder on FPGA-Based RISC-V SoCs Using RISC-V Vector Extension

    IEEE Transactions on Aerospace and Electronic Systems, Vol. 59, Núm. 5, pp. 5835-5846

2021

  1. Decoding Algorithm for Quadruple-Error-Correcting Reed-Solomon Codes and Its Derived Architectures

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 68, Núm. 4, pp. 1438-1442

2017

  1. Preface

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2016

  1. Applications of evolutionary computation: 19th European conference, Evoapplications 2016 Porto, Portugal, March 30 – April 1, 2016 proceedings, part II

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Applications of evolutionary computation: 19th European conference, evoapplications 2016 Porto, Portugal, march 30 – april 1, 2016 proceedings, part I

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2015

  1. Applications of evolutionary computation: 18th European Conference, EvoApplications 2015 Copenhagen, Denmark, April 8–10, 2015 proceedings

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2014

  1. Error correction coding for electronic circuits

    Energy-Efficient Fault-Tolerant Systems (Springer New York), pp. 137-168

2013

  1. An efficient technique to protect serial shift registers against soft errors

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 60, Núm. 8, pp. 512-516

  2. Diverse double modular redundancy: A new direction for soft-error detection and correction

    IEEE Design and Test, Vol. 30, Núm. 2, pp. 87-95

  3. Error detection in majority logic decoding of euclidean geometry low density parity check (EG-LDPC) codes

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 21, Núm. 1, pp. 156-159

  4. Low complexity concurrent error detection for complex multiplication

    IEEE Transactions on Computers, Vol. 62, Núm. 9, pp. 1899-1903

2012

  1. A (64,45) triple error correction code for memory applications

    IEEE Transactions on Device and Materials Reliability, Vol. 12, Núm. 1, pp. 101-106

  2. Area efficient concurrent error detection and correction for parallel filters

    Electronics Letters, Vol. 48, Núm. 20, pp. 1258-1260

  3. Error-detection enhanced decoding of difference set codes for memory applications

    IEEE Transactions on Device and Materials Reliability, Vol. 12, Núm. 2, pp. 335-340

  4. Multiple cell upset correction in memories using difference set codes

    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 59, Núm. 11, pp. 2592-2599

  5. On the use of euclidean geometry codes for efficient multibit error correction on memory systems

    IEEE Transactions on Nuclear Science, Vol. 59, Núm. 4 PART 1, pp. 824-828

  6. Serial symbol-reliability based algorithm for decoding non-binary LDPC codes

    IEEE Communications Letters, Vol. 16, Núm. 6, pp. 909-912

2011

  1. Efficient multibit error correction for memory applications using euclidean geometry codes

    Proceedings of the European Conference on Radiation and its Effects on Components and Systems, RADECS

  2. High-performance grid and cloud computing workshop - HPGC

    IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum