Publicaciones en colaboración con investigadores/as de University of Rochester (11)

2009

  1. Replacing associative load queues: A timing-centric approach

    IEEE Transactions on Computers, Vol. 58, Núm. 4, pp. 496-511

2006

  1. DMDC: Delayed Memory Dependence Checking through age-based filtering

    Proceedings of the Annual International Symposium on Microarchitecture, MICRO

  2. DMDC: Delayed Memory Dependence Checking through age-based filtering

    MICRO-39: PROCEEDINGS OF THE 39TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE

  3. LSQ: A power efficient and scalable implementation

    IEE Proceedings: Computers and Digital Techniques, Vol. 153, Núm. 6, pp. 389-398

  4. Substituting associative load queue with simple hash tables in out-of-order microprocessors

    Proceedings of the International Symposium on Low Power Electronics and Design

  5. Substituting associative load queue with simple hash tables in out-of-order microprocessors

    ISLPED '06: PROCEEDINGS OF THE 2006 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN

2005

  1. A power-efficient and scalable load-store queue design

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  2. Energy-aware fetch mechanism: Trace cache and BTB customization

    Proceedings of the International Symposium on Low Power Electronics and Design

  3. Load-store queue management: An energy-efficient design based on a state-filtering mechanism

    Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

2003

  1. Branch Prediction On Demand: An Energy-Efficient Solution

    Proceedings of the International Symposium on Low Power Electronics and Design

  2. Customizing the Branch Predictor to Reduce Complexity and Energy Consumption

    IEEE Micro, Vol. 23, Núm. 5, pp. 12-25