Arquitectura de Computadores y Automática
Departamento
Instituto Nacional de Técnica Aeroespacial
Madrid, EspañaPublicaciones en colaboración con investigadores/as de Instituto Nacional de Técnica Aeroespacial (14)
2018
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Modular fault tolerant processor architecture on a SoC for space
Microelectronics Reliability, Vol. 83, pp. 84-90
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Seu and Sefi error detection and correction on a ddr3 memory system
Microelectronics Reliability, Vol. 91, pp. 23-30
2017
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SEFI Protection for Nanosat 16-Bit Chip Onboard Computer Memories
IEEE Transactions on Device and Materials Reliability, Vol. 17, Núm. 4, pp. 698-707
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SEU and SEFI protection for DDR3 memories in a xilinx Zynq-7000 FPGA
Proceedings - 6th IEEE International Conference on Space Mission Challenges for Information Technology, SMC-IT 2017
2016
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Aspectos prácticos del control de actitud del satélite INTA-Nanosat-1B
Actas de las XXXVII Jornadas de Automática: Madrid. 7, 8 y 9 de septiembre de 2016
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DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs
Microelectronics Reliability, Vol. 63, pp. 314-318
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Signal conditioning for the kalman filter: Application to satellite attitude estimation with magnetometer and sun sensors
Sensors (Switzerland), Vol. 16, Núm. 11
2014
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End-to-end validation process for the INTA-Nanosat-1B Attitude Control System
Acta Astronautica, Vol. 93, pp. 94-105
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Getting more performance from INTA nanoSat-1B truncated pyramid sun sensors
IEEE Sensors Journal, Vol. 14, Núm. 6, pp. 1867-1877
2013
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Real-time evolvable pulse shaper for radiation measurements
Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 727, pp. 73-83
2008
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Allocation heuristics and defragmentation measures for reconfigurable systems management
Integration, the VLSI Journal, Vol. 41, Núm. 2, pp. 281-296
2006
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2D defragmentation heuristics for hardware multitasking on reconfigurable devices
20th International Parallel and Distributed Processing Symposium, IPDPS 2006
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Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2004
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A low fragmentation heuristic for task placement in 2D RTR HW management
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 3203, pp. 241-250