A hardware mechanism to reduce the energy consumption of the register file of in-order architectures

  1. Ayala, J.L.
  2. Lopez-Vallejo, M.
  3. López-Barrio, C.A.
  4. Veidenbaum, A.
Aldizkaria:
International Journal of Embedded Systems

ISSN: 1741-1068,  1741-1076

Argitalpen urtea: 2008

Alea: 3

Zenbakia: 4

Orrialdeak: 285-293

Mota: Artikulua

DOI: 10.1504/IJES.2008.022400 GOOGLE SCHOLAR
Datuen iturria: Scopus