Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures

  1. Atienza, D.
  2. Raghavan, P.
  3. Ayala, J.L.
  4. De Micheli, G.
  5. Catthoor, F.
  6. Verkest, D.
  7. López-Vallejo, M.
Aldizkaria:
Integration, the VLSI Journal

ISSN: 0167-9260

Argitalpen urtea: 2008

Alea: 41

Zenbakia: 1

Orrialdeak: 38-48

Mota: Artikulua

DOI: 10.1016/J.VLSI.2007.04.004 GOOGLE SCHOLAR
Datuen iturria: Scopus