A phase adaptive cache hierarchy for SMT processors

  1. López, S.
  2. Garnica, O.
  3. Albonesi, D.H.
  4. Dropsho, S.
  5. Lanchares, J.
  6. Hidalgo, J.I.
Journal:
Microprocessors and Microsystems

ISSN: 0141-9331

Year of publication: 2011

Volume: 35

Issue: 8

Pages: 683-694

Type: Conference paper

DOI: 10.1016/J.MICPRO.2011.08.008 GOOGLE SCHOLAR
Data source: Scopus