Dynamic capacity-speed tradeoffs in SMT processor caches

  1. López, S.
  2. Dropsho, S.
  3. Albonesi, D.H.
  4. Garnica, O.
  5. Lanchares, J.
Book Series:
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

ISSN: 0302-9743 1611-3349

ISBN: 9783540693376

Year of publication: 2007

Volume: 4367 LNCS

Pages: 136-150

Type: Conference paper