Rate-driven control of resizable caches for highly threaded SMT processors

  1. Lopez, S.
  2. Dropsho, S.
  3. Albonesi, D.H.
  4. Garnica, O.
  5. Lanchares, J.
Actes de conférence:
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

ISSN: 1089-795X

ISBN: 9780769529448

Année de publication: 2007

Pages: 416

Type: Communication dans un congrès

DOI: 10.1109/PACT.2007.4336244 GOOGLE SCHOLAR