FPGA placement by thermodynamic combinatorial optimization

  1. De Vicente, J.
  2. Lanchares, J.
  3. Hermida, R.
Aktak:
Proceedings -Design, Automation and Test in Europe, DATE

ISSN: 1530-1591

Argitalpen urtea: 2002

Orrialdeak: 54-60

Mota: Biltzar ekarpena

DOI: 10.1109/DATE.2002.998249 GOOGLE SCHOLAR