Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems

  1. Moreno, A.A.
  2. Olivito, J.
  3. Resano, J.
  4. Mecha, H.
Revue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1557-9999,  1063-8210

Année de publication: 2020

Volumen: 28

Número: 9

Pages: 1993-2003

Type: Article

DOI: 10.1109/TVLSI.2020.3005451 GOOGLE SCHOLAR
La source de données: Scopus