Gestión de recursos energéticamente eficiente para aplicaciones paralelas basadas en tareas en entornos multi-aplicación

  1. Costero Valero, Luis María
Zuzendaria:
  1. Katzalin Olcoz Zuzendaria
  2. Francisco Tirado Fernández Zuzendaria
  3. Francisco Daniel Igual Peña Zuzendaria

Defentsa unibertsitatea: Universidad Complutense de Madrid

Fecha de defensa: 2021(e)ko urtarrila-(a)k 28

Epaimahaia:
  1. Manuel Prieto Matías Presidentea
  2. José Luis Risco Martín Idazkaria
  3. Rafael Asenjo Plaza Kidea
  4. Jose Daniel Garcia Sanchez Kidea
  5. Andrea Bartolini Kidea
Saila:
  1. Arquitectura de Computadores y Automática

Mota: Tesia

Laburpena

The end of Dennard scaling, as well as the arrival of the post-Moore era, has meant a big change in the way performance and energy efficiency are achieved by modern processors. From a constant increase of the clock frequency as the main method to increase performance at the beginning of the 2000s, the increase in the number of cores inside processors running at relatively conservative frequencies has stabilised as the current trend to increase both performance and energy efficiency. The increase of the heterogeneity in the systems, both inside the processors comprising different types of cores (e.g., big LITTLE architectures) or adding specific compute units (like multimedia extensions), as well as in the platform by the addition of other specific compute units (like GPUs), offering different performance and energy-efficiency trade-offs. Together with the increase in the number of cores, the processor evolution has been accompanied by the addition of different techologies that allow processors to adapt dynamically to the changes in the environment and running aplications. Among others, techiniques like dynamic voltage and frequiency scaling, power capping or cache partitioning are widely used nowadays to increase the performance and/or energy-efficiency...