A new methodology to systemize the design of fault-tolerant circuits based on system knowledge

Resumen

In the last decades, integrated circuit technology advanced at big paces increasing transistor densities, performance and reducing power consumption. This trend seems set to continue for future generations of technology advances. At the same time, reliability of these circuits has been put into the spotlight. Before, errors due to radiation and other phenomena were negligible, but those became magnified to such a degree where they are able to alter the implemented behavior causing a failure of the whole electronic circuit. In order to mitigate such effects on circuits, general techniques such as triple modular redundancy (TMR), can be applied to increase reliability. At the same time, those solutions come at a high cost (in the case of TMR over 200% overhead), which for some applications is prohibitive. In order to tackle the disadvantages of general solutions, ad-hoc techniques which are custom-tailored to specific cases can be employed. The cost improvements of ad-hoc techniques can be significant in comparison to general techniques. However, they are difficult to design and their application is non trivial. The proposition of this thesis is to develop a systematic workflow for designing ad-hoc techniques. For that, a set of circuits was studied using an inductive process, which led to the identification of common circuit traits. Based on this better understanding and deeper expertise, referred to herein as system knowledge, a novel design methodology has been developed for designing ad-hoc techniques with reduces cost without jeopardizing fault tolerance. For verification, several case studies of ad-hoc techniques have been assessed using the proposed design methodology, showing in each case a significant cost improvement and thereby validating the proposal.