Design and implementation of a fault-tolerant star tracker image processing system in an sram-based fpga

Resumen

Star trackers are autonomous, high-accuracy electronic systems used to determine the attitude of a spacecraft. Typical star tracker systems can weigh from 1 to 7 kilograms and consume up to 15 watts of power. These technical specifications imply a high demand of weight and power that small spacecraft such as picosats or CubeSats cannot afford. Therefore, classic star trackers are not yet suitable for these smallsat applications. In recent years, Commercial Off-The-Shelf (COTS)-based star trackers are growing in importance for low-cost and short-duration missions due to the emergence of the previously mentioned small-size spacecraft. The current trend in COTS electronic devices is to increase component density and functionalities, so they are interesting alternatives to implement complex attitude determination algorithms. However, electronics miniaturization also makes these devices more susceptible to radiation-induced errors caused by ionizing radiation. Energetic particles can collide with the transistors of the device leading to e.g. Single-Event Upsets (SEUs), a type of error that modifies the value of a memory cell. Consequently, COTS components are not fully prepared to operate in space applications. In order to mitigate these radiation effects in electronic devices, expensive manufacturing processes can be used. However, this approach is inconsistent with low-cost COTS-based projects, so a Radiation Hardening by Design (RHBD) approach is usually followed. Typically, when the complexity and heterogeneity of the system that is going to be implemented in the COTS component is high, classic protection schemes based on modular redundancy are chosen to shorten development times. The main drawbacks of the previously mentioned approaches are related to the high resource usage and power consumption. In this thesis, a divide-and-conquer approach combined with ad-hoc protection techniques is presented to create a fault tolerant image processing system of a COTS-based star tracker. The image processing system has been divided into smaller and less complex modules with homogeneous properties that have been protected using custom techniques. These techniques have been developed to obtain the right balance between the resource overhead added to the unprotected design and the final error detection/correction rate achieved. The effectiveness of the combined strategy proposed in this thesis has been validated creating a completely functional image processing system of a star tra-cker. The protected system has been evaluated in terms of resource usage, error detection rate, and reconfiguration rate obtaining positive results. The number of undetected errors achieved is similar to classic redundancy-based approaches, but it uses fewer FPGA resources and requires fewer unnecessary reconfigurations. Moreover, the effect of the undetected errors has been measured to verify that they do not heavily affect the subsequent star identification algorithms. Therefore, it can be concluded that the proposed ``divide-and-conquer'' approach combined with ad-hoc protection techniques can be used to adapt the fault tolerance of a complex system to the mission requirements. In particular, a fault tolerant image processing system based on COTS components has been successfully designed and implemented using this approach.