I-DPs CGRA: An interleaved-datapaths reconfigurable accelerator for embedded bio-signal processing

  1. Duch, L.
  2. Basu, S.
  3. Peon-Quiros, M.
  4. Ansaloni, G.
  5. Pozzi, L.
  6. Atienza, D.
Journal:
IEEE Embedded Systems Letters

ISSN: 1943-0663

Year of publication: 2019

Volume: 11

Issue: 2

Pages: 50-53

Type: Article

DOI: 10.1109/LES.2018.2849267 GOOGLE SCHOLAR
Data source: Scopus