Design and implementation of efficient QCA full-adders using fault-tolerant majority gates

1. Bravo-Montes, J.A.
2. Martín-Toledano, A.
3. Sánchez-Macián, A.
4. Ruano, O.
5. Garcia-Herrero, F.

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DOI: 10.1007/S11227-021-04247-9 GOOGLE SCHOLAR HANDLE: https://hdl.handle.net/20.500.14352/91881 HANDLE: https://hdl.handle.net/20.500.14352/110140

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Data source: Scopus