Two Behavioural Error Detection Techniques for the Cascaded Integrator–Comb Interpolation Filter Implemented on FPGA

  1. Gear, K.W.
  2. Sánchez-Macián, A.
  3. Garcia-Herrero, F.
  4. Maestro, J.A.
Revue:
Circuits, Systems, and Signal Processing

ISSN: 1531-5878,  0278-081X

Année de publication: 2020

Volumen: 39

Número: 11

Pages: 5529-5542

Type: Article

DOI: 10.1007/S00034-020-01418-6 GOOGLE SCHOLAR
La source de données: Scopus