Error detection in majority logic decoding of euclidean geometry low density parity check (EG-LDPC) codes

  1. Reviriego, P.
  2. Maestro, J.A.
  3. Flanagan, M.F.
Aldizkaria:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Argitalpen urtea: 2013

Alea: 21

Zenbakia: 1

Orrialdeak: 156-159

Mota: Artikulua

DOI: 10.1109/TVLSI.2011.2179681 GOOGLE SCHOLAR