Contention-aware scheduling and resource management for emerging multicore architectures

  1. García García, Adrián
Supervised by:
  1. Manuel Prieto Matías Director
  2. Juan Carlos Saez Alcaide Director

Defence university: Universidad Complutense de Madrid

Fecha de defensa: 14 December 2021

Committee:
  1. Luis Piñuel Moreno Chair
  2. Daniel Ángel Chaver Martínez Secretary
  3. Pablo Enrique Ibáñez Marín Committee member
  4. Javier Setoain Rodrigo Committee member
  5. Enrique Salvador Quintana Ortí Committee member
Department:
  1. Arquitectura de Computadores y Automática

Type: Thesis

Abstract

Chip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip. Nevertheless, contention on shared resources on CMPs -present since the advent of these architectures- still poses a big challenge. Cores in a CMP typically share a last-level cache (LLC) and other memory-related resources with the remaining cores, such as a DRAM controller and an interconnection network. This causes that co-running applications may intensively compete with each other for these shared resources, leading to substantial and uneven performance degradation...