Publicaciones en las que colabora con JOSÉ FRANCISCO TIRADO FERNÁNDEZ (19)

2008

  1. Applying speculation techniques to implement functional units

    26th IEEE International Conference on Computer Design 2008, ICCD

2005

  1. Energy characterization of garbage collectors for dynamic applications on embedded systems

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2004

  1. Garbage collector refinement for new dynamic multimedia applications on embedded systems

    Proceedings - Eighth Workshop on Interaction between Compilers and Computer Architectures, INTERACT-8 2004

1999

  1. Unified data path allocation and BIST intrusion

    Integration, the VLSI Journal, Vol. 28, Núm. 1, pp. 55-99

1996

  1. A method for area estimation of datapath in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258265

  2. Method for area estimation of data-path in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258-265

1995

  1. Distributed parallel computers versus PVM on a workstation cluster in the simulation of time dependent partial differential equations

    Proceedings - Euromicro Workshop on Parallel and Distributed Processing

  2. FIDIAS: an integral approach to high-level synthesis

    IEE Proceedings: Circuits, Devices and Systems, Vol. 142, Núm. 4, pp. 227-235

1994

  1. Integración del análisis y mejora de la testabilidad en una herramienta de SAN

    Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria

1993

  1. Data path structures and heuristics for testable allocation in high level synthesis

    Microprocessing and Microprogramming, Vol. 39, Núm. 2-5, pp. 263-266

  2. Guidance for optimization-based synthesis tools

    Microprocessing and Microprogramming, Vol. 37, Núm. 1-5, pp. 95-98

1992

  1. Design control in a high level synthesis system

    Microprocessing and Microprogramming, Vol. 34, Núm. 1-5, pp. 93-96

  2. HEURISTICS FOR BRANCH-AND-BOUND GLOBAL ALLOCATION

    EURO-DAC 92 : EUROPEAN DESIGN AUTOMATION CONFERENCE

  3. Heuristics for branch-and-bound global allocation

    European Design Automation Conference

1991

  1. A hardware allocator guided by cost functions

    Microprocessing and Microprogramming, Vol. 32, Núm. 1-5, pp. 185-192

  2. Un sistema flexible de síntesis de alto nivel

    Diseño de circuitos integrados: actas del VI Congreso. Santander, 11/15 de noviembre de 1991

1990

  1. HARDWARE ALLOCATION IN FIDIAS SYSTEM

    PROCEEDINGS OF THE 1990 IEEE INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND SOFTWARE ENGINEERING

  2. Hardware allocation in FIDIAS system

    Proc 1990 IEEE Int Conf Comput Syst Software Eng COMPEURO 90

1988

  1. Microprocessor instruction for undergraduate students

    Education and Computing, Vol. 4, Núm. 4, pp. 265-272