Grupo de gestión de hardware reconfigurable
University of Bologna
Bolonia, ItaliaPublicaciones en colaboración con investigadores/as de University of Bologna (7)
2007
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HW-SW emulation framework for temperature-aware design in MPSoCs
ACM Transactions on Design Automation of Electronic Systems
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Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
2006
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A complete multi-processor system-on-chip FPGA-based emulation framework
IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip
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A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
Proceedings - Design Automation Conference
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Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems
Integration, the VLSI Journal, Vol. 39, Núm. 2, pp. 113-130
2005
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A novel approach for network on chip emulation
Proceedings - IEEE International Symposium on Circuits and Systems
2004
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An integrated hardware/software approach for run-time scratchpad management
Proceedings - Design Automation Conference