LUIS
PIÑUEL MORENO
Profesor titular de universidad
Interuniversity Microelectronics Centre
Lovaina, BélgicaPublications en collaboration avec des chercheurs de Interuniversity Microelectronics Centre (2)
2024
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Improving the Representativeness of Simulation Intervals for the Cache Memory System
IEEE Access, Vol. 12, pp. 5973-5985
2005
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Improving superword level parallelism support in modern compilers
CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis