Publications by the researcher in collaboration with Manuel Valencia Barrero (3)

2007

  1. A switching noise vision of the optimization techniques for low-power synthesis

    European Conference on Circuit Theory and Design 2007, ECCTD 2007

  2. Asymmetric clock driver for improved power and noise performances

    Proceedings - IEEE International Symposium on Circuits and Systems

2005

  1. Application of clock gating techniques at a flip-flop level to switching noise reduction in VLSI circuits

    Proceedings of SPIE - The International Society for Optical Engineering