CHRISTIAN TOMÁS
TENLLADO VAN DER REIJDEN
Profesor titular de universidad
JOSÉ IGNACIO
GÓMEZ PÉREZ
Profesor titular de universidad
Publications by the researcher in collaboration with JOSÉ IGNACIO GÓMEZ PÉREZ (22)
2024
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DiFLUsion: A novel space-time alert system for IAAP
German Journal of Veterinary Research, Vol. 4, Núm. 4, pp. 31-42
2023
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COMPAD: A heterogeneous cache-scratchpad CPU architecture with data layout compaction for embedded loop-dominated applications
Journal of Systems Architecture, Vol. 145
2022
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Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices
ACM Transactions on Embedded Computing Systems, Vol. 21, Núm. 1
2020
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Spatio-Temporal Resolution of Irradiance Samples in Machine Learning Approaches for Irradiance Forecasting
IEEE Access, Vol. 8, pp. 51518-51531
2019
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A comparative analysis on the impact of bank contention in STT-MRAM and SRAM based LLCs
Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019
2018
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A CPU-GPU Parallel Ant Colony Optimization Solver for the Vehicle Routing Problem
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks
Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
2017
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Cross-layer design and analysis of a low power, high density STT-MRAM for embedded systems
Proceedings - IEEE International Symposium on Circuits and Systems
2015
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System level exploration of a STT-MRAM based level 1 data-cache
Proceedings -Design, Automation and Test in Europe, DATE
2014
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Adaptive mapping and parameter selection scheme to improve automatic code generation for GPUs
Proceedings of the 12th ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2014
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Feasibility exploration of NVM based I-cache through MSHR enhancements
Proceedings -Design, Automation and Test in Europe, DATE
2013
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Design exploration of a NVM based hybrid instruction memory organization for embedded platforms
Design Automation for Embedded Systems, Vol. 7, Núm. 5, pp. 459-483
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Multi-level clustering on metric spaces using a multi-GPU platform
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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Polyhedral parallel code generation for CUDA
Transactions on Architecture and Code Optimization, Vol. 9, Núm. 4
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Range query processing on single and multi GPU environments
Computers and Electrical Engineering
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System-level memory management based on statistical variability compensation for frame-based applications
Transactions on Embedded Computing Systems
2012
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OpenIRS-UCM: An open-source multi-platform for interactive response systems
Annual Conference on Innovation and Technology in Computer Science Education, ITiCSE
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Parallelism on the nonnegative matrix factorization
Advances in Parallel Computing
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Range query processing in a multi-GPU environment
Proceedings of the 2012 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012
2011
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kNN query processing in metric spaces using GPUs
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)