Publicaciones en colaboración con investigadores/as de Stanford University (9)

2016

  1. Nano-Engineered Architectures for Ultra-Low Power Wireless Body Sensor Nodes

    2016 INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS (CODES+ISSS)

2015

  1. ICCAD 2015 Contest in 3D Interlayer Cooling Optimized Network

    2015 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD)

2009

  1. Design of Compact Imperfection-Immune CNFET Layouts for Standard-Cell-Based Logic Synthesis

    DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3

2008

  1. Designing routing and message-dependent deadlock free Networks on Chips

    VLSI-SOC: RESEARCH TRENDS IN VLSI AND SYSTEMS ON CHIP

2007

  1. Reliability support for on-chip memories using Networks-on-Chip

    PROCEEDINGS 2006 INTERNATIONAL CONFERENCE ON COMPUTER DESIGN

2006

  1. A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip

    43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006

  2. Comparison of a timing-error tolerant scheme with a traditional re-transmission mechanism for networks on chips

    2006 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP PROCEEDINGS

  3. Designing application-specific networks on chips with floorplan information

    IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN, DIGEST OF TECHNICAL PAPERS, ICCAD

  4. Designing message-dependent deadlock free networks on chips for application-specific systems on chips

    IFIP VLSI-SOC 2006: IFIP WG 10.5 INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION & SYSTEM-ON-CHIP