Publications by the researcher in collaboration with JOSÉ FRANCISCO TIRADO FERNÁNDEZ (5)

1999

  1. Unified data path allocation and BIST intrusion

    Integration, the VLSI Journal, Vol. 28, Núm. 1, pp. 55-99

1996

  1. A method for area estimation of datapath in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258265

  2. Method for area estimation of data-path in high level synthesis

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 15, Núm. 2, pp. 258-265

1995

  1. FIDIAS: an integral approach to high-level synthesis

    IEE Proceedings: Circuits, Devices and Systems, Vol. 142, Núm. 4, pp. 227-235

1994

  1. Integración del análisis y mejora de la testabilidad en una herramienta de SAN

    Actas del IX Congreso de Diseño de Circuitos Integrados, 9, 10 y 11 de noviembre de 1994, Maspalomas, Gran Canaria