JUAN
LANCHARES DÁVILA
Catedrático de universidad
ROMÁN
HERMIDA CORREA
Investigador hasta 2022
Publicaciones en las que colabora con ROMÁN HERMIDA CORREA (18)
2004
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Annealing placement by thermodynamic combinatorial optimization
ACM Transactions on Design Automation of Electronic Systems, Vol. 9, Núm. 3, pp. 310-332
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Empirical characterization of the latency of long asynchronous pipelines with data-dependent module delays
Proceedings - Euromicro Conference on Parellel, Distribeted and Network-based Proceeding
2003
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Multi-FPGA systems synthesis by means of evolutionary computation
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2724, pp. 2109-2120
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Placement by thermodynamic simulated annealing
Physics Letters, Section A: General, Atomic and Solid State Physics, Vol. 317, Núm. 5-6, pp. 415-423
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Power-consumption reduction in asynchronous circuits using delay path unequalization
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2799, pp. 151-160
2002
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A hybrid evolutionary algorithm for Multi-FPGA systems design
Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002
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A new methodology to design low-power asynchronous circuits
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
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FPGA placement by thermodynamic combinatorial optimization
Proceedings -Design, Automation and Test in Europe, DATE
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Optimization of asynchronous delay-insensitive pipeline latency using stage reorganization and optimal stage parameter estimation
Fundamenta Informaticae, Vol. 50, Núm. 2, pp. 155-174
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Optimization of equational specifications using genetic techniques
Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002
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Transformation of equational specification by means of genetic programming
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2001
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A pseudo relay-insensitive timing model to synthesising low-power asynchronous circuits
Proceedings -Design, Automation and Test in Europe, DATE
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Optimization of asynchronous delay-insensitive pipeline latency using stage reorganization and optimal stage parameter estimation
Proceedings - International Conference on Application of Concurrency to System Design, ACSD
2000
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Adaptive FPGA placement by natural optimization
Proceedings of the International Workshop on Rapid System Prototyping
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Fine-grain asynchronous circuits for low-power high performance DSP implementations
IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
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Partitioning and placement for multi-FPGA systems using genetic algorithms
Conference Proceedings of the EUROMICRO
1999
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Placement optimization based on global routing updating for system partitioning onto multi-FPGA mesh topologies
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
1998
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RSR: A new rectilinear Steiner minimum tree approximation for FPGA placement and global routing
Proceedings - 24th EUROMICRO Conference, EURMIC 1998