Publicaciones en colaboración con investigadores/as de University of California, Irvine (22)

2019

  1. Efficient mitchell's approximate log multipliers for convolutional neural networks

    IEEE Transactions on Computers, Vol. 68, Núm. 5, pp. 660-675

2018

  1. Low-power Implementation of Mitchell's Approximate Logarithmic Multiplication for Convolutional Neural Networks

    2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)

  2. Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks

    Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

2014

  1. Ultra-low-power adder stage design for exascale floating point units

    ACM Transactions on Embedded Computing Systems

2009

  1. A framework for low energy data management in reconfigurable multi-context architectures

    Journal of Systems Architecture, Vol. 55, Núm. 2, pp. 127-139

2008

  1. A coarse-grain dynamically reconfigurable system and compilation framework

    Fine-and Coarse-Grain Reconfigurable Computing (Springer Netherlands), pp. 181-215

  2. Scheduling methodology for conditional execution of kernels onto multicontext reconfigurable architectures

    IET Computers and Digital Techniques, Vol. 2, Núm. 3, pp. 199-213

2006

  1. Configuration scheduling for conditional branch execution onto multi-context reconfigurable architectures

    Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

  2. Configuration scheduling for conditional branch execution onto multi-context reconfigurable architectures

    2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS

2005

  1. A low energy data management for multi-context reconfigurable architectures

    New Algorithms, Architectures and Applications for Reconfigurable Computing (Springer US), pp. 145-155

  2. Low power data prefetch for 3D image applications on coarse-grain reconfigurable architectures

    Proceedings - 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005

2004

  1. Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures

    Second IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS 2004

2003

  1. Low energy data management for different on-chip memory levels in multi-context reconfigurable architectures

    Proceedings -Design, Automation and Test in Europe, DATE

2002

  1. A complete data scheduler for multi-context reconfigurable architectures

    Proceedings -Design, Automation and Test in Europe, DATE

  2. A framework for reconfigurable computing: Task scheduling and context management - A summary

    IEEE Circuits and Systems Magazine, Vol. 2, Núm. 4, pp. 48-51

2001

  1. A data scheduler for multi-context reconfigurable architectures

    Proceedings of the International Symposium on System Synthesis, pp. 177-182

  2. A formal approach to context scheduling for multicontext reconfigurable architectures

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 9, Núm. 1, pp. 173-185

  3. A framework for reconfigurable computing: Task scheduling and context management

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 9, Núm. 6, pp. 858-873

  4. Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing

    Journal of Systems Architecture, Vol. 47, Núm. 3-4, pp. 277-292

2000

  1. Optimal vs. heuristic approaches to context scheduling for multi-context reconfigurable architectures

    IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings