Publikationen, an denen er mitarbeitet Antonio Artés Rodríguez (7)

2013

  1. Design space exploration of distributed loop buffer architectures with incompatible loop-nest organisations in embedded systems

    Journal of Signal Processing Systems, Vol. 72, Núm. 1, pp. 69-85

  2. Energy impact in the design space exploration of loop buffer schemes in embedded systems

    IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC

  3. Survey of low-energy techniques for instruction memory organisations in embedded systems

    Journal of Signal Processing Systems, Vol. 70, Núm. 1, pp. 1-19

2012

  1. IMOSIM: Exploration tool for instruction memory organisations based on accurate cycle-level energy modelling

    2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012

  2. Power impact of loop buffer schemes for biomedical Wireless Sensor Nodes

    Sensors (Switzerland), Vol. 12, Núm. 11, pp. 15088-15118

2011

  1. Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications

    2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011

2010

  1. Energy efficiency using loop buffer based instruction memory organizations

    Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems