Publicaciones en colaboración con investigadores/as de Universitat Jaume I (23)

2020

  1. Programming parallel dense matrix factorizations with look-ahead and OpenMP

    Cluster Computing, Vol. 23, Núm. 1, pp. 359-375

2019

  1. A Case for Malleable Thread-Level Linear Algebra Libraries: The LU Factorization with Partial Pivoting

    IEEE Access, Vol. 7, pp. 17617-17633

  2. Dynamic look-ahead in the reduction to band form for the singular value decomposition

    Parallel Computing, Vol. 81, pp. 22-31

  3. Look-ahead in the two-sided reduction to compact band forms for symmetric eigenvalue problems and the SVD

    Numerical Algorithms, Vol. 80, Núm. 2, pp. 635-660

2018

  1. Energy balance between voltage-frequency scaling and resilience for linear algebra routines on low-power multicore architectures

    Parallel Computing, Vol. 73, pp. 28-39

  2. Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors

    Journal of Computational Science, Vol. 25, pp. 140-151

  3. Reduction to band form for the singular value decomposition on graphics accelerators

    Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM 2018

  4. Static scheduling of the LU factorization with look-ahead on asymmetric multicore processors

    Parallel Computing, Vol. 76, pp. 18-27

  5. Two-sided orthogonal reductions to condensed forms on asymmetric multicore processors

    Parallel Computing, Vol. 78, pp. 85-100

2017

  1. Architecture-aware optimization of an HEVC decoder on asymmetric multicore processors

    Journal of Real-Time Image Processing, Vol. 13, Núm. 1, pp. 25-38

  2. Reduction to tridiagonal form for symmetric eigenproblems on asymmetric multicore processors

    Proceedings of the 8th International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM 2017

  3. Revisiting conventional task schedulers to exploit asymmetry in multi-core architectures for dense linear algebra operations

    Parallel Computing, Vol. 68, pp. 59-76

  4. Static versus dynamic task scheduling of the LU factorization on arm big. little architectures

    Proceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2017

  5. Tiles-and WPP-based HEVC Decoding on Asymmetric Multi-core Processors

    Proceedings - 2017 IEEE 3rd International Conference on Multimedia Big Data, BigMM 2017

  6. Time and energy modeling of a high-performance multi-threaded Cholesky factorization

    Journal of Supercomputing, Vol. 73, Núm. 1, pp. 139-151

2016

  1. Architecture-aware configuration and scheduling of matrix multiplication on asymmetric multicore processors

    Cluster Computing, Vol. 19, Núm. 3, pp. 1037-1051

  2. Refactoring conventional task schedulers to exploit asymmetric ARM big.LITTLE architectures in dense linear algebra

    Proceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016

2015

  1. Fast video transcoding from HEVC to VP9

    IEEE Transactions on Consumer Electronics, Vol. 61, Núm. 3, pp. 336-343

  2. HEVC to VP9 transcoder

    2015 Visual Communications and Image Processing, VCIP 2015

  3. Time and energy modeling of an INTRA-ONLY HEVC encoder

    2015 Visual Communications and Image Processing, VCIP 2015