Informática
Facultad
ROMÁN
HERMIDA CORREA
Investigador hasta 2022
Publicaciones en las que colabora con ROMÁN HERMIDA CORREA (150)
2023
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HackRF + GNU Radio: A software-defined radio to teach communication theory
International Journal of Electrical Engineering and Education, Vol. 60, Núm. 1, pp. 23-40
2022
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Efficient micro data centres deployment for mobile healthcare monitoring systems in IoT urban scenarios
Journal of Simulation, Vol. 16, Núm. 6, pp. 589-603
2020
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Evaluation of blood pressure estimation models based on pulse arrival time
Computers and Electrical Engineering, Vol. 84
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Unit testing platform to verify devs models
Simulation Series
2019
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A combined arithmetic-high-level synthesis solution to deploy partial carry-save radix-8 booth multipliers in datapaths
IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, Núm. 2, pp. 742-755
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Efficient mitchell's approximate log multipliers for convolutional neural networks
IEEE Transactions on Computers, Vol. 68, Núm. 5, pp. 660-675
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Modular framework to model critical events in stroke patients
Simulation Series
2018
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A Modular Low-Complexity ECG Delineation Algorithm for Real-Time Embedded Systems
IEEE Journal of Biomedical and Health Informatics, Vol. 22, Núm. 2, pp. 429-441
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Complexity reduction in the HEVC/H265 standard based on smooth region classification
Digital Signal Processing: A Review Journal, Vol. 73, pp. 24-39
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Low-power Implementation of Mitchell's Approximate Logarithmic Multiplication for Convolutional Neural Networks
2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)
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Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2017
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A Slack-based Approach to Efficiently Deploy Radix 8 Booth Multipliers
PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
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A slack-based approach to efficiently deploy radix 8 booth multipliers
Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
2016
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A Distributed Clustered Architecture to Tackle Delay Variations in Datapath Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, Núm. 3, pp. 419-432
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A Partial Carry-Save On-the-Fly Correction Multispeculative Multiplier
IEEE Transactions on Computers, Vol. 65, Núm. 11, pp. 3251-3264
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Runtime data center temperature prediction using Grammatical Evolution techniques
Applied Soft Computing Journal, Vol. 49, pp. 94-107
2014
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Generic Markov model of the contention access period of IEEE 802.15.4 MAC layer
Digital Signal Processing: A Review Journal, Vol. 33, pp. 191-205
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Improving circuit performance with multispeculative additive trees in high-level synthesis
Microelectronics Journal, Vol. 45, Núm. 11, pp. 1470-1479
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Ultra-low-power adder stage design for exascale floating point units
ACM Transactions on Embedded Computing Systems
2013
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A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths
Integration, the VLSI Journal, Vol. 46, Núm. 2, pp. 119-130