Publications dans lesquelles il/elle collabore avec María Luisa López Vallejo (27)

2018

  1. SoC Communication Architectures: From Interconnection Buses to Packet-Switched NoCs

    Embedded Systems Handbook: Second Edition (CRC Press), pp. 14-1-14-29

2010

  1. Thermal analysis and modeling of embedded processors

    Computers and Electrical Engineering, Vol. 36, Núm. 1, pp. 142-154

2009

  1. SoC communication architectures: From interconnection buses to packet-switched NoCs

    Embedded Systems Design and Verification: Embedded Systems Handbook, Second Edition (CRC Press), pp. 14-1-14-29

2007

  1. Energy-aware compilation and hardware design for VLIW embedded systems

    International Journal of Embedded Systems, Vol. 3, Núm. 1-2, pp. 73-82

  2. Exploring temperature-aware design of memory architectures in VLIW systems

    Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems

  3. Leakage-based on-chip thermal sensor for CMOS technology

    Proceedings - IEEE International Symposium on Circuits and Systems

  4. Reduction of register file delay due to process variability in VLIW embedded processors

    Proceedings - IEEE International Symposium on Circuits and Systems

  5. Thermal Characterization and Thermal Management in Processor-Based Systems

    Dagstuhl Seminar Proceedings

2006

  1. A banked precomputation-based CAM architecture for low-power storage-demanding applications

    Proceedings of the Mediterranean Electrotechnical Conference - MELECON

  2. A low-power pipelined CAM for high-performance IP routing

    Proceedings of the Sixth International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2006 - Final Program and Technical Digest

  3. Analysis of the thermal impact of source-code transformations in embedded-processors

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

  4. Compilation for delay impact minimization in VLIW embedded systems

    Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems

  5. Compiler-driven leakage energy reduction in banked register files

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

  6. Leakage energy reduction in banked content addressable memories

    Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

  7. Target independent thermal modeling for embedded processors

    Industrial Embedded Systems - IES'2006