Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications
- Artes, A.
- Ayala, J.L.
- Sathanur, A.V.
- Huisken, J.
- Catthoor, F.
Konferenzberichte:
2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011
ISBN: 9781457701719
Datum der Publikation: 2011
Seiten: 136-141
Art: Konferenz-Beitrag