A reconfigurable modular architecture to exploit word-level parallelism

  1. Carballo, D.J.
  2. Pardines, I.
  3. Sanchez-Elez, M.
Journal:
Journal of Circuits, Systems and Computers

ISSN: 0218-1266

Year of publication: 2009

Volume: 18

Issue: 7

Pages: 1227-1241

Type: Article

DOI: 10.1142/S0218126609005630 GOOGLE SCHOLAR