Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs

  1. Garnica, O.
  2. Lanchares, J.
  3. Hidalgo, J.I.
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1557-9999,  1063-8210

Year of publication: 2020

Volume: 28

Issue: 4

Pages: 914-925

Type: Article

DOI: 10.1109/TVLSI.2019.2961782 GOOGLE SCHOLAR
Data source: Scopus