Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs

  1. Garnica, O.
  2. Lanchares, J.
  3. Hidalgo, J.I.
Aldizkaria:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1557-9999,  1063-8210

Argitalpen urtea: 2020

Alea: 28

Zenbakia: 4

Orrialdeak: 914-925

Mota: Artikulua

DOI: 10.1109/TVLSI.2019.2961782 GOOGLE SCHOLAR
Datuen iturria: Scopus