MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction

  1. Saiz-Adalid, L.-J.
  2. Reviriego, P.
  3. Gil, P.
  4. Pontarelli, S.
  5. Maestro, J.A.
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Year of publication: 2015

Volume: 23

Issue: 10

Pages: 2332-2336

Type: Article

DOI: 10.1109/TVLSI.2014.2357476 GOOGLE SCHOLAR
Data source: Scopus