Reducing false positives due to double adjacent errors in instruction TLBs

  1. Sánchez-Macián, A.
  2. Aranda, L.A.
  3. Reviriego, P.
  4. Maestro, J.A.
Journal:
Microelectronics Reliability

ISSN: 0026-2714

Year of publication: 2019

Volume: 102

Type: Article

DOI: 10.1016/J.MICROREL.2019.113494 GOOGLE SCHOLAR