A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices

  1. Nacci, Alessandro Antonio
  2. Rana, Vincenzo
  3. Bruschi, Francesco
  4. Sciuto, Donatella
  5. Beretta, Ivan
  6. Atienza, David
Book Series:
2013 50TH ACM / EDAC / IEEE DESIGN AUTOMATION CONFERENCE (DAC)

ISSN: 0738-100X

ISBN: 978-1-4503-2071-9

Year of publication: 2013

Congress: 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

Type: Conference paper