A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices
- Nacci, Alessandro Antonio
- Rana, Vincenzo
- Bruschi, Francesco
- Sciuto, Donatella
- Beretta, Ivan
- Atienza, David
ISSN: 0738-100X
ISBN: 978-1-4503-2071-9
Argitalpen urtea: 2013
Biltzarra: 50th ACM/EDAC/IEEE Design Automation Conference (DAC)
Mota: Biltzar ekarpena