Publicaciones en colaboración con investigadores/as de Universidad de Zaragoza (19)

2020

  1. Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 28, Núm. 9, pp. 1993-2003

2016

  1. Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 24, Núm. 2, pp. 530-543

2014

  1. An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems

    ACM Transactions on Embedded Computing Systems, Vol. 13, Núm. 4

  2. Configuration mapping algorithms to reduce energy and time reconfiguration overheads in reconfigurable systems

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, Núm. 6, pp. 1248-1261

2013

  1. An FPGA-based specific processor for Blokus Duo

    FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology

  2. The promise of reconfigurable computing for hyperspectral imaging onboard systems: A review and trends

    Proceedings of the IEEE, Vol. 101, Núm. 3, pp. 698-722

  3. Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing

    Integration, the VLSI Journal, Vol. 46, Núm. 2, pp. 89-103

2012

  1. FPGA implementation of abundance estimation for spectral unmixing of hyperspectral data using the image space reconstruction algorithm

    IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing, Vol. 5, Núm. 1, pp. 248-261

  2. FPGA implementation of the N-FINDR algorithm for remotely sensed hyperspectral image analysis

    IEEE Transactions on Geoscience and Remote Sensing, Vol. 50, Núm. 2, pp. 374-388

2011

  1. A Hardware implementation of a run-time scheduler for reconfigurable systems

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, Núm. 7, pp. 1263-1276

  2. A replacement technique to maximize task reuse in reconfigurable systems

    IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum

  3. FPGA implementation of endmember extraction algorithms from hyperspectral imagery: Pixel purity index versus N-FINDR

    Proceedings of SPIE - The International Society for Optical Engineering

2010

  1. A task graph execution manager for reconfigurable multi-tasking systems

    Microprocessors and Microsystems, Vol. 34, Núm. 2-4, pp. 73-83

  2. FPGA Implementation of the pixel purity index algorithm for remotely sensed hyperspectral image analysis

    Eurasip Journal on Advances in Signal Processing, Vol. 2010

  3. FPGA implementation of a strong Reversi player

    Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10

2009

  1. An initial specific processor for Sudoku solving

    Proceedings of the 2009 International Conference on Field-Programmable Technology, FPT'09

  2. FPGA support for satellite computations of hyper spectral images

    FPL 09: 19th International Conference on Field Programmable Logic and Applications