SANDRA
CATALÁN PALLARÉS
Profesora ayudante doctora
Universitat Jaume I
Castelló de la Plana, EspañaPublikationen in Zusammenarbeit mit Forschern von Universitat Jaume I (31)
2023
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Automatic Generation of Micro-kernels for Performance Portability of Matrix Multiplication on RISC-V Vector Processors
ACM International Conference Proceeding Series
2021
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Leveraging teaching on demand: Approaching HPC to undergrads
Journal of Parallel and Distributed Computing, Vol. 156, pp. 148-162
2020
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Programming parallel dense matrix factorizations with look-ahead and OpenMP
Cluster Computing, Vol. 23, Núm. 1, pp. 359-375
2019
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A Case for Malleable Thread-Level Linear Algebra Libraries: The LU Factorization with Partial Pivoting
IEEE Access, Vol. 7, pp. 17617-17633
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Dynamic look-ahead in the reduction to band form for the singular value decomposition
Parallel Computing, Vol. 81, pp. 22-31
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Look-ahead in the two-sided reduction to compact band forms for symmetric eigenvalue problems and the SVD
Numerical Algorithms, Vol. 80, Núm. 2, pp. 635-660
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Teaching on Demand: an HPC Experience
Proceedings of EduHPC 2019: Workshop on Education for High Performance Computing - Held in conjunction with SC 2019: The International Conference for High Performance Computing, Networking, Storage and Analysis
2018
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Aprendiendo bases de datos... al revés
Actas de las Jornadas sobre la Enseñanza Universitaria de la Informática (JENUI), Núm. 3
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Energy balance between voltage-frequency scaling and resilience for linear algebra routines on low-power multicore architectures
Parallel Computing, Vol. 73, pp. 28-39
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Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors
Journal of Computational Science, Vol. 25, pp. 140-151
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Reduction to band form for the singular value decomposition on graphics accelerators
Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM 2018
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Static scheduling of the LU factorization with look-ahead on asymmetric multicore processors
Parallel Computing, Vol. 76, pp. 18-27
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Two-sided orthogonal reductions to condensed forms on asymmetric multicore processors
Parallel Computing, Vol. 78, pp. 85-100
2017
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Reduction to tridiagonal form for symmetric eigenproblems on asymmetric multicore processors
Proceedings of the 8th International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM 2017
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Revisiting conventional task schedulers to exploit asymmetry in multi-core architectures for dense linear algebra operations
Parallel Computing, Vol. 68, pp. 59-76
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Static versus dynamic task scheduling of the LU factorization on arm big. little architectures
Proceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2017
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Time and energy modeling of a high-performance multi-threaded Cholesky factorization
Journal of Supercomputing, Vol. 73, Núm. 1, pp. 139-151
2016
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An analytical methodology to derive power models based on hardware and software metrics
Computer Science - Research and Development, Vol. 31, Núm. 4, pp. 165-174
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Architecture-aware configuration and scheduling of matrix multiplication on asymmetric multicore processors
Cluster Computing, Vol. 19, Núm. 3, pp. 1037-1051
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Evaluating fault tolerance on asymmetric multicore systems-on-chip using iso-metrics
IET Computers and Digital Techniques, Vol. 10, Núm. 2, pp. 85-92