A Methodology to Emulate Single Event Upsets in Flip-Flops Using FPGAs through Partial Reconfiguration and Instrumentation

  1. Serrano, F.
  2. Clemente, J.A.
  3. Mecha, H.
Aldizkaria:
IEEE Transactions on Nuclear Science

ISSN: 0018-9499

Argitalpen urtea: 2015

Alea: 62

Zenbakia: 4

Orrialdeak: 1617-1624

Mota: Artikulua

DOI: 10.1109/TNS.2015.2447391 GOOGLE SCHOLAR
Datuen iturria: Scopus