Application of clock gating techniques at a flip-flop level to switching noise reduction in VLSI circuits
- Parra, P.
- Castro, J.
- Valencia, M.
- Acosta, A.J.
ISSN: 0277-786X
Argitalpen urtea: 2005
Alea: 5837 PART II
Orrialdeak: 1003-1014
Mota: Biltzar ekarpena