Application of clock gating techniques at a flip-flop level to switching noise reduction in VLSI circuits
- Parra, P.
- Castro, J.
- Valencia, M.
- Acosta, A.J.
ISSN: 0277-786X
Année de publication: 2005
Volumen: 5837 PART II
Pages: 1003-1014
Type: Communication dans un congrès