Publicaciones en las que colabora con JOSÉ FRANCISCO TIRADO FERNÁNDEZ (126)

2023

  1. Performance Portability Assessment: Non-negative Matrix Factorization as a Case Study

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2022

  1. Portability and Performance Assessment of the Non-Negative Matrix Factorization Algorithm with OpenMP and SYCL

    Proceedings - 2022 48th Latin American Computing Conference, CLEI 2022

2020

  1. Leveraging knowledge-as-a-service (KaaS) for QoS-aware resource management in multi-user video transcoding

    Journal of Supercomputing, Vol. 76, Núm. 12, pp. 9388-9403

2017

  1. Energy efficiency optimization of task-parallel codes on asymmetric architectures

    Proceedings - 2017 International Conference on High Performance Computing and Simulation, HPCS 2017

2015

  1. NMF-mGPU: Non-negative matrix factorization on multi-GPU systems

    BMC Bioinformatics, Vol. 16, Núm. 1

  2. Non-negative Matrix Factorization on Low-Power Architectures and Accelerators: A Comparative Study

    Computers and Electrical Engineering, Vol. 46, pp. 139-156

2014

  1. Improving peLIFO cache replacement policy: Hardware reduction and thread-aware extension

    Journal of Circuits, Systems and Computers, Vol. 23, Núm. 4

  2. Write-aware replacement policies for PCM-based systems

    Computer Journal, Vol. 58, Núm. 9, pp. 2000-2025

2013

  1. Acceleration of block-matching algorithms using a custom instruction-based paradigm on a Nios II microprocessor

    Eurasip Journal on Advances in Signal Processing, Vol. 2013, Núm. 1

  2. GPU-based acceleration of bio-inspired motion estimation model

    Concurrency Computation Practice and Experience

  3. Implementación de un modelo de flujo óptico robusto sobre un DSP multinúcleo

    Actas de las XXIV Jornadas de Paralelismo

  4. Implementation of a low-cost mobile devices to support medical diagnosis

    Computational and Mathematical Methods in Medicine, Vol. 2013

  5. Increasing the Endurance of Phase-Change Memories with Cache Replacement Policies

    Actas de las XXIV Jornadas de Paralelismo

  6. Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials

    Integration, the VLSI Journal, Vol. 46, Núm. 2, pp. 197-210

  7. Multi-GPU based on multicriteria optimization for motion estimation system

    Eurasip Journal on Advances in Signal Processing, Vol. 2013, Núm. 1

  8. Non-negative Matrix Factorization on low-power architectures: A comparative study

    ACM International Conference Proceeding Series

  9. Offset printing plate quality sensor on a low-cost processor

    Sensors (Switzerland), Vol. 13, Núm. 11, pp. 14277-14300

  10. Paralelismo en la factorización NMF

    Actas de las XXIV Jornadas de Paralelismo

  11. Reducing writes in phase-change memory environments by using efficient cache replacement policies

    Proceedings -Design, Automation and Test in Europe, DATE

  12. Robust motion estimation on a low-power multi-core DSP

    Eurasip Journal on Advances in Signal Processing, Vol. 2013, Núm. 1