Publicacions en què col·labora amb FRANCISCO MIGUEL GARCÍA HERRERO (9)

2024

  1. Efficient Low-Latency Multiplication Architecture for NIST Trinomials With RISC-V Integration

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 71, Núm. 8, pp. 3915-3919

2023

  1. Integration of a Real-Time CCSDS 410.0-B-32 Error-Correction Decoder on FPGA-Based RISC-V SoCs Using RISC-V Vector Extension

    IEEE Transactions on Aerospace and Electronic Systems, Vol. 59, Núm. 5, pp. 5835-5846

  2. RISC-V Galois Field ISA Extension for Non-Binary Error-Correction Codes and Classical and Post-Quantum Cryptography

    IEEE Transactions on Computers, Vol. 72, Núm. 3, pp. 682-692

2022

  1. A new radiation-hardened architecture for holographic memory address calculation

    Alexandria Engineering Journal, Vol. 61, Núm. 8, pp. 6181-6190

  2. ACME-2: Improving the Extraction of Essential Bits in Xilinx SRAM-Based FPGAs

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, Núm. 3, pp. 1577-1581

  3. Design and implementation of efficient QCA full-adders using fault-tolerant majority gates

    Journal of Supercomputing, Vol. 78, Núm. 6, pp. 8056-8080

  4. Flexible and area-efficient Galois field Arithmetic Logic Unit for soft-core processors

    Computers and Electrical Engineering, Vol. 99

2021

  1. Fault injection emulation for systems in FPGAs: Tools, techniques and methodology, a tutorial

    Sensors (Switzerland), Vol. 21, Núm. 4, pp. 1-23

  2. Reliability Analysis of ASIC Designs with Xilinx SRAM-Based FPGAs

    IEEE Access, Vol. 9, pp. 140676-140685